This invention relates to a voltage selector circuit capable of selectively taking out a plurality of voltages at different levels.
Generally, in driving liquid-crystal display devices for electronic desk top calculators, electronic watches or clocks, etc. according to a dynamic-drive display system, it is necessary to use signals consisting of voltages at 3-value or more levels. Also, in an ink-jet-type printing system, for example, it is required that signals from a character signal generator circuit be D/A-converted as voltage signals at a plurality of levels and to then be successively be delivered to deflecting electrodes in accordance with printed characters. In order to obtain such voltages at a plurality of levels, there is used a voltage selector circuit generally so constructed as shown in FIG. 1. The circuit of FIG. 1 is a voltage selector circuit for taking out voltage waveform signals (common electrode driving signals) at 3-value levels to be supplied to a liquid-crystal display device when dynamically driving the display device. In FIG. 1, numerals 1 and 2 designate p-type MOS transistors, while numerals 3, 4 and 5 designate n-type transistors. The gates of the MOS transistors 1 and 4 are supplied with an input signal A.sub.0 (32 Hz) as shown in FIG. 2(A), the gates of the MOS transistors 2 and 5 are supplied with an input signal A.sub.1 (64 Hz) as shown in FIG. 2(B), and the signal A.sub.1 is applied to the gate of the MOS transistor 3 through an inverter 6. Further, voltages V.sub.0 (0 V), V.sub.1 (-1.5 V) and V.sub.2 (-3 V) are supplied to the sources of the MOS transistors 1, 5 and 4, respectively. The respective drains of the MOS transistors 2, 3 and 5 are connected together to form an output terminal B.sub.0.
With such a construction, when the voltage levels of the input signals A.sub.0 and A.sub.1 are both low, the MOS transistors 1, 2 and 3 are turned on, and the MOS transistors 4 and 5 are turned off, so that the voltage V.sub.0 appears at the output terminal B.sub.0. When the voltage levels of the input signals A.sub.0 and A.sub.1 are low and high respectively, the MOS transistors 1 and 5 are turned on, and the MOS transistors 2, 3 and 4 are turned off, so that the voltage V.sub.1 appears at the output terminal B.sub.0. On the other hand, when the voltage levels of the input signals A.sub.0 and A.sub.1 are high and low respectively, the MOS transistors 2, 3 and 4 are turned on, and the MOS transistors 1 and 5 are turned off, so that the voltage V.sub.2 is delivered from the output terminal B.sub.0. By such switching operations of those individual transistors, a voltage waveform signal at 3-value levels as shown in FIG. 2(C) may be obtained from the output terminal B.sub.0.
The MOS transistor 5 constitutes the point of this circuit. FIG. 3 specifically shows the arrangement of the MOS transistor 5, in which n-type semiconductor layers are formed on a p-type semiconductor substrate at both right and left sides thereof, the substrate being supplied with a substrate voltage C. In this MOS transistor 5, when the voltage at the output terminal B.sub.0 is the voltage V.sub.2 (-3 V), the drain electrode is supplied with the voltage V.sub.2 (-3 V), and the voltage V.sub.1 (-1.5 V) is applied to the substrate electrode which is supplied with the same voltage as the source voltage. As generally known, a diode characteristic as indicated by broken lines of FIG. 3 is seen between the drain and substrate, so that the voltages are applied in the forward direction in the aforesaid state. Thus, a diode effect arises to produce a current flow, causing power loss. As a result, the life of batteries used as a power source for some electronic devices, such as electronic wrist watches, will be shortened, requiring more frequent replacement of batteries.